Supercomputers and their application in e-business

Theoretical and practical teaching: Review and analysis of scientific research and solutions in the field of modern multiprocessor architecture. The development of super computers: Feynman’s and Neumann’s paradigm. Types of multiprocessor computer architectures. DataFlow computers. The methodology for making the design DataFlow computer to FPGA chip. DataFlow computer with the design: MultiScaleDataFlow and access based on systolic fields. ControlFlow computers. The methodology for making the design ControlFlow computer (for VLSI chip). Planning and designing computer ControlFlow: many-core approach (NVidia) and multi-core approach (Intel). Performance analysis and DataFlow ControlFlow computer. Maxeler DataFlow paradigm. Development Tools DataFlow computer: MaxIDE and WebIDE.maxeler.com. The platform for the presentation of the eco system: appgallery.maxeler.com. DARPA paradigm for development DataFlow computer. Hardware for BigData Analytics in ‘streaming’ context. Development Tools DataFlow computer: VHDL and Verilog. Algorithms for application programming: (a) Math Algorithms in C, (b) Vision Algorithms in C, (v) Functions of the R Language, (g) Functions of the Language Python, (d) Machine Learning Algorithms, (f) Genome Informatics Algorithms. DiffusionFlow paradigm (WSN, Wireless Sensor Networks, hw / sw / system / apps and H2020 IoT 2016 initiative). QuantumFlow paradigm (QMC Quantum Mechanical Computers, hw / sw / system / apps and DARPA $ 1B 2016 initiative).

The aim of the course is to acquaint students with modern multiprocessor architectures and acquire the necessary knowledge and the DataFlow ControlFlow computers needed for independent research, modeling solutions and the application of these computers in the field of e-commerce.

1. Trifunovic, N., Milutinovic, V., et al, “The Appgallery.Maxeler.com for BigData SuperComputing,”
   Journal of Big Data, Springer, February 2016.
2. Trifunovic, N., Milutinovic, V., et al,”Paradigm Shift in SuperComputing: DataFlow vs ControlFlow,” Journal of Big Data, Springer, May 2015.
3. Milutinovic, V., et al, “Guide to DataFlow SuperComputing,” Springer, 2015 (textbook).
4. Milutinovic, V., editor, Advances in Computers: DataFlow,” Elsevier, 2015 (textbook).
5. Jovanovic, Z., Milutinovic, V., FPGA Accelerator for Floating-Point Matrix Multiplication,” The IET Computers and Digital Techniques Premium Award for 2014, Volume 6, Issue 4, 2012 (pp. 249-256).
6. Flynn, M., Mencer, O., Milutinovic, V., at al, “Moving from PetaFlops to PetaData,” Communications of the ACM, May 2013.
7. Milutinovic, V., “Surviving the Design of the DARPA 200MHz RISC Microprocessor,” IEEE CS PRESS, 2000, 2nd edition (design of a many-core CPU).
8. Milutinovic, V., “Surviving the Design of Microprocessor/Multimicroprocessor Systems, WILEY, 2000, 2nd edition (desing of a multi-core CPU).